Design of low - power voltage / current references and supply voltage for 9 - bit fully differential ADC

This paper presents the design of a low-power voltage reference, bias current and the supply voltage for a 9-bit fully differential ADC. The references, power supply circuits and the ADC are integrated in one circuit, i.e. chip. The proposed chip is implemented in the UMC 0.18 μm CMOS process and occupies 800×700 μm. The circuit supply voltage V DD is obtained from the external RF signal. When the circuit is active V DD is used as a supply for the rest of the circuitry. The circuit generates supply, reference voltages and currents when V DD exceeds the upper voltage level VHIGH ≈1.82 V. When V DD is lower than the lower voltage level VLOW ≈1.35 V, the circuit is off. When the circuit is active, the current consumption is 22 μA. The presented results are based on measurements.